As the critical dimensions in CMOS manufacturing shrink for the 90 nm technology node and beyond, conventional (polycrystalline) silicon gates are being replaced by metal gates (meaning pure metals, metal alloys or metal nitrides, etc) and SiO2 as a gate dielectric is replaced by materials with higher dielectric constant (so called “high-k” dielectrics). The key challenge is to adapt the conventional gate etch processes to these new materials.
Following deposition and gate patterning, the high-k dielectric material is removed from the source and drain regions of the transistor. This removal is accomplished without the loss of any of the underlying silicon, as well as little or no isolation oxide (field oxide) loss. To date, the most promising dry etch results show an HfO2 to silicon (HfO2/Si), as well as an HfO2 to SiO2 (HfO2/SiO2) etch selectivity no greater than three. Dilute aqueous hydrofluoric acid (HF) solutions will etch HfO2 but unfortunately, the etch selectivity of HfO2 over thermally grown silicon dioxide (TOX) is ˜1:10, and the etch selectivity of HfO2 over tetraethylorthosilicate-based silicon dioxide (TEOS) is ˜1:100 for dilute aqueous HF etchants. Replacing water with a non-aqueous solvent, such as an alcohol, will improve etch selectivity. An HfO2 to TOX etch selectivity of 3:1 and an HfO2 to TEOS etch selectivity of 1:1 has been reported (Claes et al., “Selective Wet Etching of Hf-Based Layers,” Abstract 549, 204th Meet. of Electrochem. Soc., 2003).